周智君 职称：讲师

办公室：李文正楼北423 学习经历：

2006/09-2008/06南京理工大学电子工程学士

2008/09-2010/06英国伯明翰城市大学电子工程学士

2010/10-2011/10英国布里斯托大学微电子硕士

2012/02-2017/01英国布里斯托大学电子工程博士 工作经历:

2017/10-至今东南大学信息学院

面向神经信号的多通道前置低噪声低功耗模拟放大器的设计与创新

Z. Zhou and P. A. Warr, A High Input Impedance Low Noise Integrated Front-End Amplifier for Neural Monitoring, in IEEE Transactions on Biomedical Circuits and Systems, vol. 10, no. 6, pp. 1079-1086, Dec. 2016.

Z. Zhou and P. A. Warr, Back-gate current neutralisation feedback loop for high-input impedance neural FEAs, in Electronics Letters, vol. 52, no. 19, pp. 1586-1588, 9 15 2016.

Zhijun Zhou, Paul Warr, A segmentation layout guarding technique to mitigate parasitic capacitance of integrated resistors, Analog Integrated Circuits and Signal Processing, pp, 2017, ISSN 0925-1030.